Automotive High-Speed Signal Testing and Consulting Services

The height of an eye diagram only shows that the signal has sufficient voltage margin, while jitter measures whether the signal’s timing is accurate. These are two different aspects, so a signal can have a clean eye diagram and still fail the jitter test. Common causes include:

• Unstable clock sources, such as poor PLL or reference clock (REFCLK) quality
• Improper spread spectrum clocking (SSC) settings
• Power supply noise
• Crosstalk between adjacent signal lines
• Signal reflections caused by the circuit design
• Timing shifts caused by specific data patterns

These issues usually need to be analyzed step by step with high-end measurement instruments. Allion can help identify the root cause and provide specific recommendations for improvement.

This means the signal barely passes at first, but the system gradually drifts away from its optimal state during operation. Common causes include:

• The receiver’s clock tracking (CDR) gradually fails to keep up with the signal
• The chip drifts while automatically adjusting its signal equalization settings
• The device under test renegotiates its link state on its own
• Temperature rises or power fluctuates during operation

When the errors appear can also provide clues:

• Errors occur at the same point every time: usually caused by a state transition inside the device
• Errors occur sooner as interference increases: indicates insufficient signal margin

Allion can simultaneously record error timing, link status, temperature, and power changes during testing to help pinpoint what triggers the issue.

Sync loss means the test instrument can no longer synchronize with the device under test at all, which is more serious than occasional bit errors. Think of it this way: occasional errors are like brief static during a phone call, while sync loss is like the call dropping entirely. Common causes include:

• Complete failure of the receiver’s clock tracking
• The device under test exiting test mode
• The link state being renegotiated
• Incorrect test settings, such as the wrong test pattern or signal polarity
• Excessive interference conditions applied during testing

We recommend first reducing interference to a minimum and confirming that the basic link works, then gradually adding test conditions back. Allion can help review test settings and narrow down the problem step by step.

Not necessarily. DM-I (differential-mode interference) is noise intentionally injected during testing to verify a product’s interference tolerance. If errors disappear once it is turned off, that only shows the issue is related to this interference. The cause may lie on either the test side or the product side:

• Test side: the interference is over-calibrated or the measurement reference plane is set incorrectly, causing the actual interference to exceed the specification; or the combined stress becomes too strong when stacked with other interference sources
• Product side: insufficient signal equalization capability at the receiver, unstable adaptation under interference, affected clock tracking, or circuit reflections amplifying the interference

We recommend adjusting the interference level gradually to see at what point errors begin, which effectively narrows down the cause. Allion first verifies that the test conditions comply with the specification to avoid misjudging product quality.

PCIe Gen6 uses PAM4 signaling, in which the signal has four voltage levels that form three vertically stacked eye diagrams. As a result, checking whether the eyes are open is not enough. Two additional metrics must also be examined:

• SNDR (Signal-to-Noise and Distortion Ratio): measures how much noise and distortion are present in the signal
• RLM (Ratio of Level Separation Mismatch): checks whether the spacing between the four voltage levels is even

Common causes include:

• SNDR failures: poor transmitter circuit linearity, excessive equalization settings, power supply noise, or clock jitter
• RLM failures: inconsistent gain across the four voltage levels, or the transmitter driver reaching its output limit

If only one eye is noticeably smaller, start by checking RLM. If all three eyes are open but SNDR is low, the issue is more likely related to noise or distortion. Allion can help interpret measurement results and recommend appropriate improvements.